The main aim of the center is the capacity building and training of Engineers / Scientists in the field of IC design and technology. The Center will also provide IC design services to industry and other R & D organizations involved in design and development of electronic systems & circuits. Initially the center will provide training to engineers, scientists and researchers from universities and R & D organizations. The facility will be opened for university students and researchers for their projects. In order to give full concept of IC Design technology, the student project chips will be fabricated from abroad using Multi Project Wafer (MPW) fabrication technology. MPW fabrication technology is cost effective and suitable for student project designs.
An advanced IC Design facility equipped with state-of-the-art IC Design Tools has been established. The Design Center provides complete environment for design capture, physical layout and verification of digital, analog and mixed signal integrated circuits. IC Design Tools from Mentor Graphics USA have been selected for IC nanometer design. Linux and Windows based platforms / workstations have been selected. Mentor Graphics tools are supported by the major foundries of the world. The software provides advanced set of features for physical layout, floor planning, top level assembly, interactive routing, physical verification DRC/LVS, parasitic extraction, and efficient polygon editing. The design is converted to physical mask database in GDS-II format enabling to export out design to any leading foundry.
The IC Design Center offers following services to the Industry and R & D organizations:
The Design center will also provide IC Design services to international companies.
The Center has developed special courses for students, researchers and Universities faculty. The detail of the course is as under :
The course will provide knowledge required to design, physical layout & verification of digital and analog chips using Mentor Graphics IC design Tools. There would be extensive lectures on explaining concepts and evolution of EDA design flow and fabrication techniques.
Throughout the course, the lectures will be followed by hand-on lab sessions to help participants acquire the skills to capture and simulate the design, create layout using advanced routing and floor planning tools, and finally perform design verifications.
This module covers all the important aspects of schematic capture. The participants are guided through major steps of schematic creation and editing. Apart from all this, extensive lab sessions are arranged to help them get familiar with important options of Pyxis Schematic that are readily used during designing. The module primarily covers the following two areas:
Simulation of a design is very important phase of IC Design flow. A successful simulation is the first step to guarantee the perfect results of a design. This module has been planned to cover the simulation procedures of two major types of design flows i.e. digital and analog. The module helps the participants to learn simulate their designs using following toolset:
The most important phase of IC Design flow is generating the layout. This module has been designed keeping in view the fact that mask designing is not taught in various curriculums of Electrical and Electronics Engineering. The participants will be given a good overview of issues regarding layout designing. The lab sessions will start with the Layout generation of basic electronic designs followed by some very complex digital chips. The module will majorly cover areas like:
The design flow completes with the verification of designs using standard design rules provided by the industry. This module covers all the important rule checking techniques using the design rules of advance foundries of the world. The participants are guided through all the rules checking techniques so that they could easily verify their designs in future. The module mainly covers the following areas of design verification:
Postal Address
Integrated Circuit Design Center,
National Institute of Electronics, Plot # 17, Street # 6, H-9/1, Islamabad
Exchange No: (+92)-51-9265029
Email: kamran.bhatti@nie.gov.pk , mk.bhatti@yahoo.com
